Explore the future of hardware design languages (HDLs) in this 16-minute conference talk by Vighnesh Iyer and Borivoje Nikolic from the University of California, Berkeley. Delve into the importance of composing hardware descriptions from multiple abstraction levels to enhance design productivity. Examine emerging HDLs, IRs, and HDL databases that have surfaced in the past decade. Investigate critical implementation questions surrounding HDLs, including appropriate IR primitives, preservation of design semantics during lowering, the significance of modules, and the potential for incremental elaboration. Gain insights into the next generation of HDLs and their role in advancing hardware design methodologies.
Overview
Syllabus
[PLARCH23] Mixed-Abstraction HDLs and A Discussion on Other Aspects of HDL Design
Taught by
ACM SIGPLAN