This course teaches learners how to work with Zybo FPGA by covering topics such as audio codec, filter implementation, XADC demonstration, live video streaming, creating custom IPs, VHDL programming, conditional statements, and creating bootable files. The course aims to equip students with the skills to develop FPGA projects using VIVADO design suite and Zynq FPGA. The teaching method includes demonstrations, hands-on exercises, and practical examples. This course is intended for individuals interested in FPGA development, VHDL programming, and digital design.
Overview
Syllabus
Zybo Tutorial on Audio Codec & Filter by Digitronix Nepal.
Zybo XADC Demonstration: VIVADO and Zynq FPGA Development.
Live Video Streaming Implemented on Zybo-Zynq7000 FPGA with VIVADO Design Suit.
Running Tcl Scripts on VIVADO & Zedboard DMA Audio Demo by Digitronix Nepal.
Running Tcl Scripts on VIVADO & Zedboard DMA Audio Demo by Digitronix Nepal.
How to create Custom IP on VIVADO HLS targeted for Zedboard FPGA.
Getting Started with Microblaze in VIVADO IPI for Zynq : Zedboard FPGA.
Xilinx VIVADO 2015.4 Creating open example design.
Creating Custom IP on VHDL in VIVADO Design Suit for ZedBoard.
How to Add Boards on VIVADO (How to Add Zybo Board on VIVADO).
Zybo FPGA Video Streaming with VHDL and VIVADO [4K Video].
Real Time Canny Edge Detection with Zybo FPGA: Sobel & Canny Edge Detection with Zynq.
XADC Implementation & Debugging on Zybo FPGA with VIVADO.
Learn VHDL Programming with Xilinx VIVADO and Zynq FPGA.
Conditional Statements in VHDL: Learn VHDL Programming with FPGA.
Creating Bootable File for Zynq FPGA.
Taught by
Digitronix Nepal
