ArchTM - Architecture-Aware, High Performance Transaction for Persistent Memory

ArchTM - Architecture-Aware, High Performance Transaction for Persistent Memory

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Intro

1 of 14

1 of 14

Intro

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ArchTM - Architecture-Aware, High Performance Transaction for Persistent Memory

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  1. 1 Intro
  2. 2 Persistent Memory (PM) Has Arrived
  3. 3 PM Architecture & Performance Characterization
  4. 4 Transactions on Persistent Memory
  5. 5 Issues of Existing PM Transactions
  6. 6 Issues of Memory Allocation for PM Transactions
  7. 7 Design Goals of ArchTM
  8. 8 Avoid Small Writes on PM
  9. 9 Encourage Coalescable Writes on PM
  10. 10 Recovery Management
  11. 11 Other Optimization Techniques
  12. 12 Evaluation Setup
  13. 13 Evaluation: TPC-C & TATP
  14. 14 Conclusion

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