This course focuses on isolation mechanisms for high-speed packet-processing pipelines. The learning outcomes and goals include understanding the need for isolation between packet-processing modules on the same device to prevent interference. The course teaches the concept of Menshen, an extension of the Reconfigurable Match Tables (RMT) pipeline, which enforces isolation using lightweight hardware primitives and the P4-16 reference compiler. The teaching method involves discussing the implementation of Menshen on FPGA platforms and ASICs, demonstrating its feasibility and effectiveness. The intended audience for this course includes individuals interested in data-plane programmability, network engineering, and hardware/software design for packet processing.
Isolation Mechanisms for High-Speed Packet-Processing Pipelines
Overview
Syllabus
Intro
Data-plane programmability is mainstr
Can improve performance for many sy
What is isolation?
Why do existing works not suffice?
How to implement isolation in RMT?
Menshen's high-level approach
Menshen program IDs
Review: How a RMT stage works
Menshen: How overlays work Key extraction enhancements
Menshen: How space partitioning wor Match-action enhancement
Menshen: Action engine enhancemen action entry
Menshen's design principles
Implementation
Evaluation
Can Menshen support multiple prog
Menshen's overall throughput perfo
Does reconfiguration disrupt other pr
Taught by
USENIX
