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LinkedIn Learning

Learning Verilog for FPGA Development

via LinkedIn Learning

Overview

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Learn the fundamentals of Verilog, a popular and concise hardware description language used to create FPGA-based embedded systems.

Syllabus

Introduction
  • Verilog: Your key to digital design
  • What you should know
  • Setting up your environment
1. Hardware Description
  • Hardware description languages
  • Digital systems
  • Levels of abstraction
  • Gate level
  • Register-transfer level
2. Basic Verilog Syntax
  • Verilog modules
  • Instantiating modules
  • Gates and primitives
  • Registers and wires
  • Range specification
  • Numbers and constants
  • Always blocks
  • The if-else statement
  • Case statements
  • Boolean algebra expressions
  • Continuous assignments
  • Blocking assignments
  • Nonblocking assignments
  • Challenge: From schematic to code
  • Solution: From schematic to code
3. Simulation
  • Simulation basics
  • Test bench modules
  • Stimulus variables
  • Clock generation
  • Initial and always blocks
  • A simple simulation
  • Timing directives
  • Display tasks
  • Challenge: You run the show
  • Solution: You run the show
4. Combinational Systems
  • Arithmetic and logic operators
  • Challenge: Make a 4-bit arithmetic logic unit (ALU)
  • Solution: Make a 4-bit arithmetic logic unit (ALU)
  • Getting your ALU on a field-programmable gate array (FPGA)
  • A functional demo of the ALU
5. Sequential Systems
  • Flip-flops
  • Edge sensitivity
  • A shift register example
  • Challenge: Make a clock divider
  • Solution: Make a clock divider
  • Getting your clock divider on an FPGA
  • A functional demo of the clock divider
Conclusion
  • Next steps

Taught by

Eduardo Corpeño

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4.7 rating at LinkedIn Learning based on 206 ratings

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