Digital System Design
NPTEL and Indian Institute of Technology, Ropar via Swayam
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185
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Overview
INTENDED AUDIENCE :CSE, EE, ECE undergraduate studentsPREREQUISITES : NoneINDUSTRIES SUPPORT :Any VLSI related company: Intel, AMD, TI, nVIDIA, Qualcomm, etc.
Syllabus
COURSE LAYOUT
Week 1:Introduction of digital systems. Number systemWeek 2:Number representation: BCD, floating point numbersWeek 3:Boolean algebra, application of Boolean algebra in minimization of Boolean expressionsWeek 4:Boolean minimization using K-map and Quine McCluskey method. Introduction to VerilogWeek 5:MSI Logic: Multiplexer, encoder, decoderWeek 6:Arthimetic circuits: Adder, subtractor, multiplier, comparatorWeek 7:Latches and flipflop (SR, JK, T, D), countersWeek 8:Sequential logic like Registers, introduction to behavior modeling in VerilogWeek 9:Finite state machine, state graphs and tables.Week 10:Reduction of state table and state assignments. Arithmetic circuits using sequential design.Week 11: Register transfer level (RTL) design, RTL design examplesWeek 12:FPGA,VLSI design flow using HDL, introduction to behavior, logic and physical synthesis.
Taught by
Prof. S. Srinivasan
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Reviews
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