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This course aims to teach learners about estimating the susceptibility of integrated circuit (IC) layouts to additive trojans. The course covers topics such as the hardware development process, untrusted foundry defenses, IC construction, and preventive layout-level defenses. By the end of the course, students will be able to understand how hardware trojans are inserted, evaluate ICAS metrics, and analyze the attack surface with undirected defense. The teaching method involves a lecture format with a duration of 17 minutes. This course is intended for individuals interested in hardware security, IC layout design, and system security.
