This course covers the learning outcomes and goals of booting Linux on RISC-V, including understanding the Privileged Architecture, OpenSBI, and U-Boot components. It delves into the RISC-V Platform Specification, hardware support, and upstreaming efforts. The course teaches skills such as working with RISC-V International, Virtual Memory, and Control and Status Registers. The teaching method includes lectures on RISC-V architecture, maintenance guidelines, and Linux kernel support. The intended audience for this course includes developers interested in Linux on RISC-V, open-source enthusiasts, and individuals working with embedded systems.
Overview
Syllabus
Intro
What is different about RISC-V?
RISC-V base integer registers
RISC-V Standard Extensions
RISC-V International
RISC-V Open Hours
RISC-V open source cores
RISC-V software ecosystem
RISC-V Privileged Architecture
Control and Status Registers (CSRs)
RISC-V Virtual Memory
What is a Hart?
Advanced Interrupt Architecture (AIA)
Supervisor Binary Interface (SBI)
SBI Extensions
Hypervisor extension
OpenSBI Generic Platform
UEFI Support
RISC-V Platform Specification
RISC-V ACPI Platform Specification
RISC-V emulation in QEMU
RISC-V in the Linux kernel
Linux 5.18
Upcoming Linux 6.0
Work in progress
Linux distro: Fedora
Linux distro: Ubuntu
OpenEmbedded and Yocto
BuildRoot
T-Head PTE format
Page-Based Memory Types extension
Svpbmt support in Linux
Cache Management Operations
CMO support in Linux
RISC-V Developer Boards
Taught by
Linux Foundation
