This course covers the challenges and advancements in low power circuits and embedded intelligence. Students will learn about GALS, ANOC, AVFS, FDSOI, 3D stack technologies, neuromorphic hardware, spiking neurons, RRAM, and spiking sensors. The teaching method includes lectures on various technologies and architectures. This course is intended for individuals interested in the future of circuit design, embedded systems, and advanced hardware technologies.
Stanford Seminar - The Future of Low Power Circuits and Embedded Intelligence
Stanford University via YouTube
Overview
Syllabus
Introduction.
Low Power circuits challenges.
GALS : Globally Asynchronous and Locally Synchronous.
Asynchronous NoC (ANOC) and DFS technique • ANOC main features.
Fine-Grain AVFS architecture AVES : Adaptive Voltage and Frequency Scaling : Adaptive architecture to mitigate local but also dynamic PVT variations.
FDSOI brings a new actuator.
FDSOI Back Biasing: an example.
3D stack Technologies @ CEA-Leti.
3D Interconnect and multicore scalabiity • Stacking different technologies.
3D imager: parallel in-focal plane processing.
3D stack process for backside imager.
3D Sequential @ CEA-Leti.
3D stack and sequential: memory-centric architectures.
3D technologies & flexible architectures.
Adaptivity/Flexibility Architecture, New devices and Embedded Intelligence.
Advanced technologies for neuromorphic hardware.
Spiking neurons and RRAM.
Spiking sensors and neuro-DSP.
Work in progress: 3D cortical columns.
Work in progress: 3D spiking vision system.
Taught by
Stanford Online
