Cache Side Channel Attacks - CPU Design As A Security Problem

The course focuses on cache side channel attacks and how the micro architectural design of modern computers can be exploited by attackers to breach trust boundaries. The learning outcomes include understanding how the cache subsystem of modern x86 computers can be abused to access private data, recognizing the relevance and impact of cache side channel attacks in cloud computing environments, and learning about various demonstrated attacks such as key extraction and spying on user input. The course teaches about victim time, prime and probe, flush load, eject in time, shared memory, detecting side channels using performance counters, flush reload, detecting cache misses, and analyzing code for vulnerabilities. The teaching method involves a lecture format with a focus on practical examples and demonstrations. The intended audience includes cybersecurity professionals, computer science students, and anyone interested in understanding the security implications of CPU design in modern computers.