Introduction to FPGA - RISC-V Softcore Processor

This course aims to teach learners how to create custom digital logic using the Verilog hardware description language (HDL) to build a RISC-V softcore processor for an FPGA. The course covers setting up the processor, writing a simple C test program, and challenges learners to modify the design to enable additional hardware peripherals. The teaching method involves practical demonstrations and hands-on projects. This course is intended for individuals interested in learning about FPGA technology, digital circuit design, and processor implementation using FPGAs.