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This course aims to explore the RISC-V ecosystem and its growth, emphasizing the open nature of RISC-V and the contributions from academic and industry communities. The course focuses on the increasing number of hardware designs proposals and the upcoming availability of a wider variety of RISC-V based hardware boards and extensions. The goal is to expand the RISC-V software ecosystem across the stack to position RISC-V as a true alternative to existing ISAs, with a key emphasis on Linux kernel support. The course teaches participants about design problems and ideas for different Linux kernel features, aiming to stimulate community-wide discussions and increase developer participation in code review and patch submissions for a better and more stable kernel for RISC-V. The intended audience for this course includes developers, engineers, and enthusiasts interested in RISC-V architecture and the Linux kernel.